3928 uint32_t BuiltinID) {
3933 switch (BuiltinID) {
3934 case Builtin::BI__builtin_is_constant_evaluated:
3937 case Builtin::BI__builtin_assume:
3938 case Builtin::BI__assume:
3941 case Builtin::BI__builtin_strcmp:
3942 case Builtin::BIstrcmp:
3943 case Builtin::BI__builtin_strncmp:
3944 case Builtin::BIstrncmp:
3945 case Builtin::BI__builtin_wcsncmp:
3946 case Builtin::BIwcsncmp:
3947 case Builtin::BI__builtin_wcscmp:
3948 case Builtin::BIwcscmp:
3951 case Builtin::BI__builtin_strlen:
3952 case Builtin::BIstrlen:
3953 case Builtin::BI__builtin_wcslen:
3954 case Builtin::BIwcslen:
3957 case Builtin::BI__builtin_nan:
3958 case Builtin::BI__builtin_nanf:
3959 case Builtin::BI__builtin_nanl:
3960 case Builtin::BI__builtin_nanf16:
3961 case Builtin::BI__builtin_nanf128:
3964 case Builtin::BI__builtin_nans:
3965 case Builtin::BI__builtin_nansf:
3966 case Builtin::BI__builtin_nansl:
3967 case Builtin::BI__builtin_nansf16:
3968 case Builtin::BI__builtin_nansf128:
3971 case Builtin::BI__builtin_huge_val:
3972 case Builtin::BI__builtin_huge_valf:
3973 case Builtin::BI__builtin_huge_vall:
3974 case Builtin::BI__builtin_huge_valf16:
3975 case Builtin::BI__builtin_huge_valf128:
3976 case Builtin::BI__builtin_inf:
3977 case Builtin::BI__builtin_inff:
3978 case Builtin::BI__builtin_infl:
3979 case Builtin::BI__builtin_inff16:
3980 case Builtin::BI__builtin_inff128:
3983 case Builtin::BI__builtin_copysign:
3984 case Builtin::BI__builtin_copysignf:
3985 case Builtin::BI__builtin_copysignl:
3986 case Builtin::BI__builtin_copysignf128:
3989 case Builtin::BI__builtin_fmin:
3990 case Builtin::BI__builtin_fminf:
3991 case Builtin::BI__builtin_fminl:
3992 case Builtin::BI__builtin_fminf16:
3993 case Builtin::BI__builtin_fminf128:
3996 case Builtin::BI__builtin_fminimum_num:
3997 case Builtin::BI__builtin_fminimum_numf:
3998 case Builtin::BI__builtin_fminimum_numl:
3999 case Builtin::BI__builtin_fminimum_numf16:
4000 case Builtin::BI__builtin_fminimum_numf128:
4003 case Builtin::BI__builtin_fmax:
4004 case Builtin::BI__builtin_fmaxf:
4005 case Builtin::BI__builtin_fmaxl:
4006 case Builtin::BI__builtin_fmaxf16:
4007 case Builtin::BI__builtin_fmaxf128:
4010 case Builtin::BI__builtin_fmaximum_num:
4011 case Builtin::BI__builtin_fmaximum_numf:
4012 case Builtin::BI__builtin_fmaximum_numl:
4013 case Builtin::BI__builtin_fmaximum_numf16:
4014 case Builtin::BI__builtin_fmaximum_numf128:
4017 case Builtin::BI__builtin_isnan:
4020 case Builtin::BI__builtin_issignaling:
4023 case Builtin::BI__builtin_isinf:
4026 case Builtin::BI__builtin_isinf_sign:
4029 case Builtin::BI__builtin_isfinite:
4032 case Builtin::BI__builtin_isnormal:
4035 case Builtin::BI__builtin_issubnormal:
4038 case Builtin::BI__builtin_iszero:
4041 case Builtin::BI__builtin_signbit:
4042 case Builtin::BI__builtin_signbitf:
4043 case Builtin::BI__builtin_signbitl:
4046 case Builtin::BI__builtin_isgreater:
4047 case Builtin::BI__builtin_isgreaterequal:
4048 case Builtin::BI__builtin_isless:
4049 case Builtin::BI__builtin_islessequal:
4050 case Builtin::BI__builtin_islessgreater:
4051 case Builtin::BI__builtin_isunordered:
4054 case Builtin::BI__builtin_isfpclass:
4057 case Builtin::BI__builtin_fpclassify:
4060 case Builtin::BI__builtin_fabs:
4061 case Builtin::BI__builtin_fabsf:
4062 case Builtin::BI__builtin_fabsl:
4063 case Builtin::BI__builtin_fabsf128:
4066 case Builtin::BI__builtin_abs:
4067 case Builtin::BI__builtin_labs:
4068 case Builtin::BI__builtin_llabs:
4071 case Builtin::BI__builtin_popcount:
4072 case Builtin::BI__builtin_popcountl:
4073 case Builtin::BI__builtin_popcountll:
4074 case Builtin::BI__builtin_popcountg:
4075 case Builtin::BI__popcnt16:
4076 case Builtin::BI__popcnt:
4077 case Builtin::BI__popcnt64:
4080 case Builtin::BI__builtin_parity:
4081 case Builtin::BI__builtin_parityl:
4082 case Builtin::BI__builtin_parityll:
4085 return APInt(Val.getBitWidth(), Val.popcount() % 2);
4087 case Builtin::BI__builtin_clrsb:
4088 case Builtin::BI__builtin_clrsbl:
4089 case Builtin::BI__builtin_clrsbll:
4092 return APInt(Val.getBitWidth(),
4093 Val.getBitWidth() - Val.getSignificantBits());
4095 case Builtin::BI__builtin_bitreverse8:
4096 case Builtin::BI__builtin_bitreverse16:
4097 case Builtin::BI__builtin_bitreverse32:
4098 case Builtin::BI__builtin_bitreverse64:
4100 S, OpPC,
Call, [](
const APSInt &Val) {
return Val.reverseBits(); });
4102 case Builtin::BI__builtin_classify_type:
4105 case Builtin::BI__builtin_expect:
4106 case Builtin::BI__builtin_expect_with_probability:
4109 case Builtin::BI__builtin_rotateleft8:
4110 case Builtin::BI__builtin_rotateleft16:
4111 case Builtin::BI__builtin_rotateleft32:
4112 case Builtin::BI__builtin_rotateleft64:
4113 case Builtin::BI_rotl8:
4114 case Builtin::BI_rotl16:
4115 case Builtin::BI_rotl:
4116 case Builtin::BI_lrotl:
4117 case Builtin::BI_rotl64:
4120 return Value.rotl(Amount);
4123 case Builtin::BI__builtin_rotateright8:
4124 case Builtin::BI__builtin_rotateright16:
4125 case Builtin::BI__builtin_rotateright32:
4126 case Builtin::BI__builtin_rotateright64:
4127 case Builtin::BI_rotr8:
4128 case Builtin::BI_rotr16:
4129 case Builtin::BI_rotr:
4130 case Builtin::BI_lrotr:
4131 case Builtin::BI_rotr64:
4134 return Value.rotr(Amount);
4137 case Builtin::BI__builtin_ffs:
4138 case Builtin::BI__builtin_ffsl:
4139 case Builtin::BI__builtin_ffsll:
4142 return APInt(Val.getBitWidth(),
4143 Val.isZero() ? 0u : Val.countTrailingZeros() + 1u);
4146 case Builtin::BIaddressof:
4147 case Builtin::BI__addressof:
4148 case Builtin::BI__builtin_addressof:
4152 case Builtin::BIas_const:
4153 case Builtin::BIforward:
4154 case Builtin::BIforward_like:
4155 case Builtin::BImove:
4156 case Builtin::BImove_if_noexcept:
4160 case Builtin::BI__builtin_eh_return_data_regno:
4163 case Builtin::BI__builtin_launder:
4167 case Builtin::BI__builtin_add_overflow:
4168 case Builtin::BI__builtin_sub_overflow:
4169 case Builtin::BI__builtin_mul_overflow:
4170 case Builtin::BI__builtin_sadd_overflow:
4171 case Builtin::BI__builtin_uadd_overflow:
4172 case Builtin::BI__builtin_uaddl_overflow:
4173 case Builtin::BI__builtin_uaddll_overflow:
4174 case Builtin::BI__builtin_usub_overflow:
4175 case Builtin::BI__builtin_usubl_overflow:
4176 case Builtin::BI__builtin_usubll_overflow:
4177 case Builtin::BI__builtin_umul_overflow:
4178 case Builtin::BI__builtin_umull_overflow:
4179 case Builtin::BI__builtin_umulll_overflow:
4180 case Builtin::BI__builtin_saddl_overflow:
4181 case Builtin::BI__builtin_saddll_overflow:
4182 case Builtin::BI__builtin_ssub_overflow:
4183 case Builtin::BI__builtin_ssubl_overflow:
4184 case Builtin::BI__builtin_ssubll_overflow:
4185 case Builtin::BI__builtin_smul_overflow:
4186 case Builtin::BI__builtin_smull_overflow:
4187 case Builtin::BI__builtin_smulll_overflow:
4190 case Builtin::BI__builtin_addcb:
4191 case Builtin::BI__builtin_addcs:
4192 case Builtin::BI__builtin_addc:
4193 case Builtin::BI__builtin_addcl:
4194 case Builtin::BI__builtin_addcll:
4195 case Builtin::BI__builtin_subcb:
4196 case Builtin::BI__builtin_subcs:
4197 case Builtin::BI__builtin_subc:
4198 case Builtin::BI__builtin_subcl:
4199 case Builtin::BI__builtin_subcll:
4202 case Builtin::BI__builtin_clz:
4203 case Builtin::BI__builtin_clzl:
4204 case Builtin::BI__builtin_clzll:
4205 case Builtin::BI__builtin_clzs:
4206 case Builtin::BI__builtin_clzg:
4207 case Builtin::BI__lzcnt16:
4208 case Builtin::BI__lzcnt:
4209 case Builtin::BI__lzcnt64:
4212 case Builtin::BI__builtin_ctz:
4213 case Builtin::BI__builtin_ctzl:
4214 case Builtin::BI__builtin_ctzll:
4215 case Builtin::BI__builtin_ctzs:
4216 case Builtin::BI__builtin_ctzg:
4219 case Builtin::BI__builtin_elementwise_clzg:
4220 case Builtin::BI__builtin_elementwise_ctzg:
4223 case Builtin::BI__builtin_bswapg:
4224 case Builtin::BI__builtin_bswap16:
4225 case Builtin::BI__builtin_bswap32:
4226 case Builtin::BI__builtin_bswap64:
4229 case Builtin::BI__atomic_always_lock_free:
4230 case Builtin::BI__atomic_is_lock_free:
4233 case Builtin::BI__c11_atomic_is_lock_free:
4236 case Builtin::BI__builtin_complex:
4239 case Builtin::BI__builtin_is_aligned:
4240 case Builtin::BI__builtin_align_up:
4241 case Builtin::BI__builtin_align_down:
4244 case Builtin::BI__builtin_assume_aligned:
4247 case clang::X86::BI__builtin_ia32_bextr_u32:
4248 case clang::X86::BI__builtin_ia32_bextr_u64:
4249 case clang::X86::BI__builtin_ia32_bextri_u32:
4250 case clang::X86::BI__builtin_ia32_bextri_u64:
4253 unsigned BitWidth = Val.getBitWidth();
4254 uint64_t Shift = Idx.extractBitsAsZExtValue(8, 0);
4255 uint64_t Length = Idx.extractBitsAsZExtValue(8, 8);
4256 if (Length > BitWidth) {
4261 if (Length == 0 || Shift >= BitWidth)
4262 return APInt(BitWidth, 0);
4264 uint64_t
Result = Val.getZExtValue() >> Shift;
4265 Result &= llvm::maskTrailingOnes<uint64_t>(Length);
4269 case clang::X86::BI__builtin_ia32_bzhi_si:
4270 case clang::X86::BI__builtin_ia32_bzhi_di:
4273 unsigned BitWidth = Val.getBitWidth();
4274 uint64_t Index = Idx.extractBitsAsZExtValue(8, 0);
4277 if (Index < BitWidth)
4278 Result.clearHighBits(BitWidth - Index);
4283 case clang::X86::BI__builtin_ia32_ktestcqi:
4284 case clang::X86::BI__builtin_ia32_ktestchi:
4285 case clang::X86::BI__builtin_ia32_ktestcsi:
4286 case clang::X86::BI__builtin_ia32_ktestcdi:
4289 return APInt(
sizeof(
unsigned char) * 8, (~A & B) == 0);
4292 case clang::X86::BI__builtin_ia32_ktestzqi:
4293 case clang::X86::BI__builtin_ia32_ktestzhi:
4294 case clang::X86::BI__builtin_ia32_ktestzsi:
4295 case clang::X86::BI__builtin_ia32_ktestzdi:
4298 return APInt(
sizeof(
unsigned char) * 8, (A & B) == 0);
4301 case clang::X86::BI__builtin_ia32_kortestcqi:
4302 case clang::X86::BI__builtin_ia32_kortestchi:
4303 case clang::X86::BI__builtin_ia32_kortestcsi:
4304 case clang::X86::BI__builtin_ia32_kortestcdi:
4307 return APInt(
sizeof(
unsigned char) * 8, ~(A | B) == 0);
4310 case clang::X86::BI__builtin_ia32_kortestzqi:
4311 case clang::X86::BI__builtin_ia32_kortestzhi:
4312 case clang::X86::BI__builtin_ia32_kortestzsi:
4313 case clang::X86::BI__builtin_ia32_kortestzdi:
4316 return APInt(
sizeof(
unsigned char) * 8, (A | B) == 0);
4319 case clang::X86::BI__builtin_ia32_kshiftliqi:
4320 case clang::X86::BI__builtin_ia32_kshiftlihi:
4321 case clang::X86::BI__builtin_ia32_kshiftlisi:
4322 case clang::X86::BI__builtin_ia32_kshiftlidi:
4325 unsigned Amt = RHS.getZExtValue() & 0xFF;
4326 if (Amt >= LHS.getBitWidth())
4327 return APInt::getZero(LHS.getBitWidth());
4328 return LHS.shl(Amt);
4331 case clang::X86::BI__builtin_ia32_kshiftriqi:
4332 case clang::X86::BI__builtin_ia32_kshiftrihi:
4333 case clang::X86::BI__builtin_ia32_kshiftrisi:
4334 case clang::X86::BI__builtin_ia32_kshiftridi:
4337 unsigned Amt = RHS.getZExtValue() & 0xFF;
4338 if (Amt >= LHS.getBitWidth())
4339 return APInt::getZero(LHS.getBitWidth());
4340 return LHS.lshr(Amt);
4343 case clang::X86::BI__builtin_ia32_lzcnt_u16:
4344 case clang::X86::BI__builtin_ia32_lzcnt_u32:
4345 case clang::X86::BI__builtin_ia32_lzcnt_u64:
4348 return APInt(Src.getBitWidth(), Src.countLeadingZeros());
4351 case clang::X86::BI__builtin_ia32_tzcnt_u16:
4352 case clang::X86::BI__builtin_ia32_tzcnt_u32:
4353 case clang::X86::BI__builtin_ia32_tzcnt_u64:
4356 return APInt(Src.getBitWidth(), Src.countTrailingZeros());
4359 case clang::X86::BI__builtin_ia32_pdep_si:
4360 case clang::X86::BI__builtin_ia32_pdep_di:
4363 unsigned BitWidth = Val.getBitWidth();
4366 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4368 Result.setBitVal(I, Val[P++]);
4374 case clang::X86::BI__builtin_ia32_pext_si:
4375 case clang::X86::BI__builtin_ia32_pext_di:
4378 unsigned BitWidth = Val.getBitWidth();
4381 for (
unsigned I = 0, P = 0; I != BitWidth; ++I) {
4383 Result.setBitVal(P++, Val[I]);
4389 case clang::X86::BI__builtin_ia32_addcarryx_u32:
4390 case clang::X86::BI__builtin_ia32_addcarryx_u64:
4391 case clang::X86::BI__builtin_ia32_subborrow_u32:
4392 case clang::X86::BI__builtin_ia32_subborrow_u64:
4396 case Builtin::BI__builtin_os_log_format_buffer_size:
4399 case Builtin::BI__builtin_ptrauth_string_discriminator:
4402 case Builtin::BI__builtin_infer_alloc_token:
4405 case Builtin::BI__noop:
4409 case Builtin::BI__builtin_operator_new:
4412 case Builtin::BI__builtin_operator_delete:
4415 case Builtin::BI__arithmetic_fence:
4418 case Builtin::BI__builtin_reduce_add:
4419 case Builtin::BI__builtin_reduce_mul:
4420 case Builtin::BI__builtin_reduce_and:
4421 case Builtin::BI__builtin_reduce_or:
4422 case Builtin::BI__builtin_reduce_xor:
4423 case Builtin::BI__builtin_reduce_min:
4424 case Builtin::BI__builtin_reduce_max:
4427 case Builtin::BI__builtin_elementwise_popcount:
4430 return APInt(Src.getBitWidth(), Src.popcount());
4432 case Builtin::BI__builtin_elementwise_bitreverse:
4434 S, OpPC,
Call, [](
const APSInt &Src) {
return Src.reverseBits(); });
4436 case Builtin::BI__builtin_elementwise_abs:
4439 case Builtin::BI__builtin_memcpy:
4440 case Builtin::BImemcpy:
4441 case Builtin::BI__builtin_wmemcpy:
4442 case Builtin::BIwmemcpy:
4443 case Builtin::BI__builtin_memmove:
4444 case Builtin::BImemmove:
4445 case Builtin::BI__builtin_wmemmove:
4446 case Builtin::BIwmemmove:
4449 case Builtin::BI__builtin_memcmp:
4450 case Builtin::BImemcmp:
4451 case Builtin::BI__builtin_bcmp:
4452 case Builtin::BIbcmp:
4453 case Builtin::BI__builtin_wmemcmp:
4454 case Builtin::BIwmemcmp:
4457 case Builtin::BImemchr:
4458 case Builtin::BI__builtin_memchr:
4459 case Builtin::BIstrchr:
4460 case Builtin::BI__builtin_strchr:
4461 case Builtin::BIwmemchr:
4462 case Builtin::BI__builtin_wmemchr:
4463 case Builtin::BIwcschr:
4464 case Builtin::BI__builtin_wcschr:
4465 case Builtin::BI__builtin_char_memchr:
4468 case Builtin::BI__builtin_object_size:
4469 case Builtin::BI__builtin_dynamic_object_size:
4472 case Builtin::BI__builtin_is_within_lifetime:
4475 case Builtin::BI__builtin_elementwise_add_sat:
4478 return LHS.isSigned() ? LHS.sadd_sat(RHS) : LHS.uadd_sat(RHS);
4481 case Builtin::BI__builtin_elementwise_sub_sat:
4484 return LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS);
4486 case X86::BI__builtin_ia32_extract128i256:
4487 case X86::BI__builtin_ia32_vextractf128_pd256:
4488 case X86::BI__builtin_ia32_vextractf128_ps256:
4489 case X86::BI__builtin_ia32_vextractf128_si256:
4492 case X86::BI__builtin_ia32_extractf32x4_256_mask:
4493 case X86::BI__builtin_ia32_extractf32x4_mask:
4494 case X86::BI__builtin_ia32_extractf32x8_mask:
4495 case X86::BI__builtin_ia32_extractf64x2_256_mask:
4496 case X86::BI__builtin_ia32_extractf64x2_512_mask:
4497 case X86::BI__builtin_ia32_extractf64x4_mask:
4498 case X86::BI__builtin_ia32_extracti32x4_256_mask:
4499 case X86::BI__builtin_ia32_extracti32x4_mask:
4500 case X86::BI__builtin_ia32_extracti32x8_mask:
4501 case X86::BI__builtin_ia32_extracti64x2_256_mask:
4502 case X86::BI__builtin_ia32_extracti64x2_512_mask:
4503 case X86::BI__builtin_ia32_extracti64x4_mask:
4506 case clang::X86::BI__builtin_ia32_pmulhrsw128:
4507 case clang::X86::BI__builtin_ia32_pmulhrsw256:
4508 case clang::X86::BI__builtin_ia32_pmulhrsw512:
4511 return (llvm::APIntOps::mulsExtended(LHS, RHS).ashr(14) + 1)
4512 .extractBits(16, 1);
4515 case clang::X86::BI__builtin_ia32_movmskps:
4516 case clang::X86::BI__builtin_ia32_movmskpd:
4517 case clang::X86::BI__builtin_ia32_pmovmskb128:
4518 case clang::X86::BI__builtin_ia32_pmovmskb256:
4519 case clang::X86::BI__builtin_ia32_movmskps256:
4520 case clang::X86::BI__builtin_ia32_movmskpd256: {
4524 case X86::BI__builtin_ia32_psignb128:
4525 case X86::BI__builtin_ia32_psignb256:
4526 case X86::BI__builtin_ia32_psignw128:
4527 case X86::BI__builtin_ia32_psignw256:
4528 case X86::BI__builtin_ia32_psignd128:
4529 case X86::BI__builtin_ia32_psignd256:
4533 return APInt::getZero(AElem.getBitWidth());
4534 if (BElem.isNegative())
4539 case clang::X86::BI__builtin_ia32_pavgb128:
4540 case clang::X86::BI__builtin_ia32_pavgw128:
4541 case clang::X86::BI__builtin_ia32_pavgb256:
4542 case clang::X86::BI__builtin_ia32_pavgw256:
4543 case clang::X86::BI__builtin_ia32_pavgb512:
4544 case clang::X86::BI__builtin_ia32_pavgw512:
4546 llvm::APIntOps::avgCeilU);
4548 case clang::X86::BI__builtin_ia32_pmaddubsw128:
4549 case clang::X86::BI__builtin_ia32_pmaddubsw256:
4550 case clang::X86::BI__builtin_ia32_pmaddubsw512:
4555 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4556 return (LoLHS.zext(BitWidth) * LoRHS.sext(BitWidth))
4557 .sadd_sat((HiLHS.zext(BitWidth) * HiRHS.sext(BitWidth)));
4560 case clang::X86::BI__builtin_ia32_pmaddwd128:
4561 case clang::X86::BI__builtin_ia32_pmaddwd256:
4562 case clang::X86::BI__builtin_ia32_pmaddwd512:
4567 unsigned BitWidth = 2 * LoLHS.getBitWidth();
4568 return (LoLHS.sext(BitWidth) * LoRHS.sext(BitWidth)) +
4569 (HiLHS.sext(BitWidth) * HiRHS.sext(BitWidth));
4572 case clang::X86::BI__builtin_ia32_pmulhuw128:
4573 case clang::X86::BI__builtin_ia32_pmulhuw256:
4574 case clang::X86::BI__builtin_ia32_pmulhuw512:
4576 llvm::APIntOps::mulhu);
4578 case clang::X86::BI__builtin_ia32_pmulhw128:
4579 case clang::X86::BI__builtin_ia32_pmulhw256:
4580 case clang::X86::BI__builtin_ia32_pmulhw512:
4582 llvm::APIntOps::mulhs);
4584 case clang::X86::BI__builtin_ia32_psllv2di:
4585 case clang::X86::BI__builtin_ia32_psllv4di:
4586 case clang::X86::BI__builtin_ia32_psllv4si:
4587 case clang::X86::BI__builtin_ia32_psllv8di:
4588 case clang::X86::BI__builtin_ia32_psllv8hi:
4589 case clang::X86::BI__builtin_ia32_psllv8si:
4590 case clang::X86::BI__builtin_ia32_psllv16hi:
4591 case clang::X86::BI__builtin_ia32_psllv16si:
4592 case clang::X86::BI__builtin_ia32_psllv32hi:
4593 case clang::X86::BI__builtin_ia32_psllwi128:
4594 case clang::X86::BI__builtin_ia32_psllwi256:
4595 case clang::X86::BI__builtin_ia32_psllwi512:
4596 case clang::X86::BI__builtin_ia32_pslldi128:
4597 case clang::X86::BI__builtin_ia32_pslldi256:
4598 case clang::X86::BI__builtin_ia32_pslldi512:
4599 case clang::X86::BI__builtin_ia32_psllqi128:
4600 case clang::X86::BI__builtin_ia32_psllqi256:
4601 case clang::X86::BI__builtin_ia32_psllqi512:
4604 if (RHS.uge(LHS.getBitWidth())) {
4605 return APInt::getZero(LHS.getBitWidth());
4607 return LHS.shl(RHS.getZExtValue());
4610 case clang::X86::BI__builtin_ia32_psrav4si:
4611 case clang::X86::BI__builtin_ia32_psrav8di:
4612 case clang::X86::BI__builtin_ia32_psrav8hi:
4613 case clang::X86::BI__builtin_ia32_psrav8si:
4614 case clang::X86::BI__builtin_ia32_psrav16hi:
4615 case clang::X86::BI__builtin_ia32_psrav16si:
4616 case clang::X86::BI__builtin_ia32_psrav32hi:
4617 case clang::X86::BI__builtin_ia32_psravq128:
4618 case clang::X86::BI__builtin_ia32_psravq256:
4619 case clang::X86::BI__builtin_ia32_psrawi128:
4620 case clang::X86::BI__builtin_ia32_psrawi256:
4621 case clang::X86::BI__builtin_ia32_psrawi512:
4622 case clang::X86::BI__builtin_ia32_psradi128:
4623 case clang::X86::BI__builtin_ia32_psradi256:
4624 case clang::X86::BI__builtin_ia32_psradi512:
4625 case clang::X86::BI__builtin_ia32_psraqi128:
4626 case clang::X86::BI__builtin_ia32_psraqi256:
4627 case clang::X86::BI__builtin_ia32_psraqi512:
4630 if (RHS.uge(LHS.getBitWidth())) {
4631 return LHS.ashr(LHS.getBitWidth() - 1);
4633 return LHS.ashr(RHS.getZExtValue());
4636 case clang::X86::BI__builtin_ia32_psrlv2di:
4637 case clang::X86::BI__builtin_ia32_psrlv4di:
4638 case clang::X86::BI__builtin_ia32_psrlv4si:
4639 case clang::X86::BI__builtin_ia32_psrlv8di:
4640 case clang::X86::BI__builtin_ia32_psrlv8hi:
4641 case clang::X86::BI__builtin_ia32_psrlv8si:
4642 case clang::X86::BI__builtin_ia32_psrlv16hi:
4643 case clang::X86::BI__builtin_ia32_psrlv16si:
4644 case clang::X86::BI__builtin_ia32_psrlv32hi:
4645 case clang::X86::BI__builtin_ia32_psrlwi128:
4646 case clang::X86::BI__builtin_ia32_psrlwi256:
4647 case clang::X86::BI__builtin_ia32_psrlwi512:
4648 case clang::X86::BI__builtin_ia32_psrldi128:
4649 case clang::X86::BI__builtin_ia32_psrldi256:
4650 case clang::X86::BI__builtin_ia32_psrldi512:
4651 case clang::X86::BI__builtin_ia32_psrlqi128:
4652 case clang::X86::BI__builtin_ia32_psrlqi256:
4653 case clang::X86::BI__builtin_ia32_psrlqi512:
4656 if (RHS.uge(LHS.getBitWidth())) {
4657 return APInt::getZero(LHS.getBitWidth());
4659 return LHS.lshr(RHS.getZExtValue());
4661 case clang::X86::BI__builtin_ia32_packsswb128:
4662 case clang::X86::BI__builtin_ia32_packsswb256:
4663 case clang::X86::BI__builtin_ia32_packsswb512:
4664 case clang::X86::BI__builtin_ia32_packssdw128:
4665 case clang::X86::BI__builtin_ia32_packssdw256:
4666 case clang::X86::BI__builtin_ia32_packssdw512:
4668 return APInt(Src).truncSSat(Src.getBitWidth() / 2);
4670 case clang::X86::BI__builtin_ia32_packusdw128:
4671 case clang::X86::BI__builtin_ia32_packusdw256:
4672 case clang::X86::BI__builtin_ia32_packusdw512:
4673 case clang::X86::BI__builtin_ia32_packuswb128:
4674 case clang::X86::BI__builtin_ia32_packuswb256:
4675 case clang::X86::BI__builtin_ia32_packuswb512:
4677 unsigned DstBits = Src.getBitWidth() / 2;
4678 if (Src.isNegative())
4679 return APInt::getZero(DstBits);
4680 if (Src.isIntN(DstBits))
4681 return APInt(Src).trunc(DstBits);
4682 return APInt::getAllOnes(DstBits);
4685 case clang::X86::BI__builtin_ia32_selectss_128:
4686 case clang::X86::BI__builtin_ia32_selectsd_128:
4687 case clang::X86::BI__builtin_ia32_selectsh_128:
4688 case clang::X86::BI__builtin_ia32_selectsbf_128:
4690 case clang::X86::BI__builtin_ia32_vprotbi:
4691 case clang::X86::BI__builtin_ia32_vprotdi:
4692 case clang::X86::BI__builtin_ia32_vprotqi:
4693 case clang::X86::BI__builtin_ia32_vprotwi:
4694 case clang::X86::BI__builtin_ia32_prold128:
4695 case clang::X86::BI__builtin_ia32_prold256:
4696 case clang::X86::BI__builtin_ia32_prold512:
4697 case clang::X86::BI__builtin_ia32_prolq128:
4698 case clang::X86::BI__builtin_ia32_prolq256:
4699 case clang::X86::BI__builtin_ia32_prolq512:
4702 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotl(RHS); });
4704 case clang::X86::BI__builtin_ia32_prord128:
4705 case clang::X86::BI__builtin_ia32_prord256:
4706 case clang::X86::BI__builtin_ia32_prord512:
4707 case clang::X86::BI__builtin_ia32_prorq128:
4708 case clang::X86::BI__builtin_ia32_prorq256:
4709 case clang::X86::BI__builtin_ia32_prorq512:
4712 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.rotr(RHS); });
4714 case Builtin::BI__builtin_elementwise_max:
4715 case Builtin::BI__builtin_elementwise_min:
4718 case clang::X86::BI__builtin_ia32_phaddw128:
4719 case clang::X86::BI__builtin_ia32_phaddw256:
4720 case clang::X86::BI__builtin_ia32_phaddd128:
4721 case clang::X86::BI__builtin_ia32_phaddd256:
4724 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
4725 case clang::X86::BI__builtin_ia32_phaddsw128:
4726 case clang::X86::BI__builtin_ia32_phaddsw256:
4729 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.sadd_sat(RHS); });
4730 case clang::X86::BI__builtin_ia32_phsubw128:
4731 case clang::X86::BI__builtin_ia32_phsubw256:
4732 case clang::X86::BI__builtin_ia32_phsubd128:
4733 case clang::X86::BI__builtin_ia32_phsubd256:
4736 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS - RHS; });
4737 case clang::X86::BI__builtin_ia32_phsubsw128:
4738 case clang::X86::BI__builtin_ia32_phsubsw256:
4741 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS.ssub_sat(RHS); });
4742 case clang::X86::BI__builtin_ia32_haddpd:
4743 case clang::X86::BI__builtin_ia32_haddps:
4744 case clang::X86::BI__builtin_ia32_haddpd256:
4745 case clang::X86::BI__builtin_ia32_haddps256:
4748 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
4753 case clang::X86::BI__builtin_ia32_hsubpd:
4754 case clang::X86::BI__builtin_ia32_hsubps:
4755 case clang::X86::BI__builtin_ia32_hsubpd256:
4756 case clang::X86::BI__builtin_ia32_hsubps256:
4759 [](
const APFloat &LHS,
const APFloat &RHS, llvm::RoundingMode RM) {
4761 F.subtract(RHS, RM);
4764 case clang::X86::BI__builtin_ia32_addsubpd:
4765 case clang::X86::BI__builtin_ia32_addsubps:
4766 case clang::X86::BI__builtin_ia32_addsubpd256:
4767 case clang::X86::BI__builtin_ia32_addsubps256:
4770 case clang::X86::BI__builtin_ia32_pmuldq128:
4771 case clang::X86::BI__builtin_ia32_pmuldq256:
4772 case clang::X86::BI__builtin_ia32_pmuldq512:
4777 return llvm::APIntOps::mulsExtended(LoLHS, LoRHS);
4780 case clang::X86::BI__builtin_ia32_pmuludq128:
4781 case clang::X86::BI__builtin_ia32_pmuludq256:
4782 case clang::X86::BI__builtin_ia32_pmuludq512:
4787 return llvm::APIntOps::muluExtended(LoLHS, LoRHS);
4790 case Builtin::BI__builtin_elementwise_fma:
4794 llvm::RoundingMode RM) {
4796 F.fusedMultiplyAdd(Y, Z, RM);
4800 case X86::BI__builtin_ia32_vpmadd52luq128:
4801 case X86::BI__builtin_ia32_vpmadd52luq256:
4802 case X86::BI__builtin_ia32_vpmadd52luq512:
4805 return A + (B.trunc(52) *
C.trunc(52)).zext(64);
4807 case X86::BI__builtin_ia32_vpmadd52huq128:
4808 case X86::BI__builtin_ia32_vpmadd52huq256:
4809 case X86::BI__builtin_ia32_vpmadd52huq512:
4812 return A + llvm::APIntOps::mulhu(B.trunc(52),
C.trunc(52)).zext(64);
4815 case X86::BI__builtin_ia32_vpshldd128:
4816 case X86::BI__builtin_ia32_vpshldd256:
4817 case X86::BI__builtin_ia32_vpshldd512:
4818 case X86::BI__builtin_ia32_vpshldq128:
4819 case X86::BI__builtin_ia32_vpshldq256:
4820 case X86::BI__builtin_ia32_vpshldq512:
4821 case X86::BI__builtin_ia32_vpshldw128:
4822 case X86::BI__builtin_ia32_vpshldw256:
4823 case X86::BI__builtin_ia32_vpshldw512:
4827 return llvm::APIntOps::fshl(Hi, Lo, Amt);
4830 case X86::BI__builtin_ia32_vpshrdd128:
4831 case X86::BI__builtin_ia32_vpshrdd256:
4832 case X86::BI__builtin_ia32_vpshrdd512:
4833 case X86::BI__builtin_ia32_vpshrdq128:
4834 case X86::BI__builtin_ia32_vpshrdq256:
4835 case X86::BI__builtin_ia32_vpshrdq512:
4836 case X86::BI__builtin_ia32_vpshrdw128:
4837 case X86::BI__builtin_ia32_vpshrdw256:
4838 case X86::BI__builtin_ia32_vpshrdw512:
4843 return llvm::APIntOps::fshr(Hi, Lo, Amt);
4845 case X86::BI__builtin_ia32_vpconflictsi_128:
4846 case X86::BI__builtin_ia32_vpconflictsi_256:
4847 case X86::BI__builtin_ia32_vpconflictsi_512:
4848 case X86::BI__builtin_ia32_vpconflictdi_128:
4849 case X86::BI__builtin_ia32_vpconflictdi_256:
4850 case X86::BI__builtin_ia32_vpconflictdi_512:
4852 case clang::X86::BI__builtin_ia32_blendpd:
4853 case clang::X86::BI__builtin_ia32_blendpd256:
4854 case clang::X86::BI__builtin_ia32_blendps:
4855 case clang::X86::BI__builtin_ia32_blendps256:
4856 case clang::X86::BI__builtin_ia32_pblendw128:
4857 case clang::X86::BI__builtin_ia32_pblendw256:
4858 case clang::X86::BI__builtin_ia32_pblendd128:
4859 case clang::X86::BI__builtin_ia32_pblendd256:
4861 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4863 unsigned MaskBit = (ShuffleMask >> (DstIdx % 8)) & 0x1;
4864 unsigned SrcVecIdx = MaskBit ? 1 : 0;
4865 return std::pair<unsigned, int>{SrcVecIdx,
static_cast<int>(DstIdx)};
4870 case clang::X86::BI__builtin_ia32_blendvpd:
4871 case clang::X86::BI__builtin_ia32_blendvpd256:
4872 case clang::X86::BI__builtin_ia32_blendvps:
4873 case clang::X86::BI__builtin_ia32_blendvps256:
4877 llvm::RoundingMode) {
return C.isNegative() ?
T : F; });
4879 case clang::X86::BI__builtin_ia32_pblendvb128:
4880 case clang::X86::BI__builtin_ia32_pblendvb256:
4883 return ((
APInt)
C).isNegative() ?
T : F;
4885 case X86::BI__builtin_ia32_ptestz128:
4886 case X86::BI__builtin_ia32_ptestz256:
4887 case X86::BI__builtin_ia32_vtestzps:
4888 case X86::BI__builtin_ia32_vtestzps256:
4889 case X86::BI__builtin_ia32_vtestzpd:
4890 case X86::BI__builtin_ia32_vtestzpd256:
4893 [](
const APInt &A,
const APInt &B) {
return (A & B) == 0; });
4894 case X86::BI__builtin_ia32_ptestc128:
4895 case X86::BI__builtin_ia32_ptestc256:
4896 case X86::BI__builtin_ia32_vtestcps:
4897 case X86::BI__builtin_ia32_vtestcps256:
4898 case X86::BI__builtin_ia32_vtestcpd:
4899 case X86::BI__builtin_ia32_vtestcpd256:
4902 [](
const APInt &A,
const APInt &B) {
return (~A & B) == 0; });
4903 case X86::BI__builtin_ia32_ptestnzc128:
4904 case X86::BI__builtin_ia32_ptestnzc256:
4905 case X86::BI__builtin_ia32_vtestnzcps:
4906 case X86::BI__builtin_ia32_vtestnzcps256:
4907 case X86::BI__builtin_ia32_vtestnzcpd:
4908 case X86::BI__builtin_ia32_vtestnzcpd256:
4911 return ((A & B) != 0) && ((~A & B) != 0);
4913 case X86::BI__builtin_ia32_selectb_128:
4914 case X86::BI__builtin_ia32_selectb_256:
4915 case X86::BI__builtin_ia32_selectb_512:
4916 case X86::BI__builtin_ia32_selectw_128:
4917 case X86::BI__builtin_ia32_selectw_256:
4918 case X86::BI__builtin_ia32_selectw_512:
4919 case X86::BI__builtin_ia32_selectd_128:
4920 case X86::BI__builtin_ia32_selectd_256:
4921 case X86::BI__builtin_ia32_selectd_512:
4922 case X86::BI__builtin_ia32_selectq_128:
4923 case X86::BI__builtin_ia32_selectq_256:
4924 case X86::BI__builtin_ia32_selectq_512:
4925 case X86::BI__builtin_ia32_selectph_128:
4926 case X86::BI__builtin_ia32_selectph_256:
4927 case X86::BI__builtin_ia32_selectph_512:
4928 case X86::BI__builtin_ia32_selectpbf_128:
4929 case X86::BI__builtin_ia32_selectpbf_256:
4930 case X86::BI__builtin_ia32_selectpbf_512:
4931 case X86::BI__builtin_ia32_selectps_128:
4932 case X86::BI__builtin_ia32_selectps_256:
4933 case X86::BI__builtin_ia32_selectps_512:
4934 case X86::BI__builtin_ia32_selectpd_128:
4935 case X86::BI__builtin_ia32_selectpd_256:
4936 case X86::BI__builtin_ia32_selectpd_512:
4939 case X86::BI__builtin_ia32_shufps:
4940 case X86::BI__builtin_ia32_shufps256:
4941 case X86::BI__builtin_ia32_shufps512:
4943 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4944 unsigned NumElemPerLane = 4;
4945 unsigned NumSelectableElems = NumElemPerLane / 2;
4946 unsigned BitsPerElem = 2;
4947 unsigned IndexMask = 0x3;
4948 unsigned MaskBits = 8;
4949 unsigned Lane = DstIdx / NumElemPerLane;
4950 unsigned ElemInLane = DstIdx % NumElemPerLane;
4951 unsigned LaneOffset = Lane * NumElemPerLane;
4952 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
4953 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
4954 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
4955 return std::pair<unsigned, int>{SrcIdx,
4956 static_cast<int>(LaneOffset + Index)};
4958 case X86::BI__builtin_ia32_shufpd:
4959 case X86::BI__builtin_ia32_shufpd256:
4960 case X86::BI__builtin_ia32_shufpd512:
4962 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
4963 unsigned NumElemPerLane = 2;
4964 unsigned NumSelectableElems = NumElemPerLane / 2;
4965 unsigned BitsPerElem = 1;
4966 unsigned IndexMask = 0x1;
4967 unsigned MaskBits = 8;
4968 unsigned Lane = DstIdx / NumElemPerLane;
4969 unsigned ElemInLane = DstIdx % NumElemPerLane;
4970 unsigned LaneOffset = Lane * NumElemPerLane;
4971 unsigned SrcIdx = ElemInLane >= NumSelectableElems ? 1 : 0;
4972 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
4973 unsigned Index = (ShuffleMask >> BitIndex) & IndexMask;
4974 return std::pair<unsigned, int>{SrcIdx,
4975 static_cast<int>(LaneOffset + Index)};
4978 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v16qi:
4979 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v32qi:
4980 case X86::BI__builtin_ia32_vgf2p8affineinvqb_v64qi:
4982 case X86::BI__builtin_ia32_vgf2p8affineqb_v16qi:
4983 case X86::BI__builtin_ia32_vgf2p8affineqb_v32qi:
4984 case X86::BI__builtin_ia32_vgf2p8affineqb_v64qi:
4987 case X86::BI__builtin_ia32_vgf2p8mulb_v16qi:
4988 case X86::BI__builtin_ia32_vgf2p8mulb_v32qi:
4989 case X86::BI__builtin_ia32_vgf2p8mulb_v64qi:
4992 case X86::BI__builtin_ia32_insertps128:
4994 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Mask) {
4996 if ((Mask & (1 << DstIdx)) != 0) {
4997 return std::pair<unsigned, int>{0, -1};
5001 unsigned SrcElem = (Mask >> 6) & 0x3;
5002 unsigned DstElem = (Mask >> 4) & 0x3;
5003 if (DstIdx == DstElem) {
5005 return std::pair<unsigned, int>{1,
static_cast<int>(SrcElem)};
5008 return std::pair<unsigned, int>{0,
static_cast<int>(DstIdx)};
5011 case X86::BI__builtin_ia32_permvarsi256:
5012 case X86::BI__builtin_ia32_permvarsf256:
5013 case X86::BI__builtin_ia32_permvardf512:
5014 case X86::BI__builtin_ia32_permvardi512:
5015 case X86::BI__builtin_ia32_permvarhi128:
5017 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5018 int Offset = ShuffleMask & 0x7;
5019 return std::pair<unsigned, int>{0, Offset};
5021 case X86::BI__builtin_ia32_permvarqi128:
5022 case X86::BI__builtin_ia32_permvarhi256:
5023 case X86::BI__builtin_ia32_permvarsi512:
5024 case X86::BI__builtin_ia32_permvarsf512:
5026 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5027 int Offset = ShuffleMask & 0xF;
5028 return std::pair<unsigned, int>{0, Offset};
5030 case X86::BI__builtin_ia32_permvardi256:
5031 case X86::BI__builtin_ia32_permvardf256:
5033 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5034 int Offset = ShuffleMask & 0x3;
5035 return std::pair<unsigned, int>{0, Offset};
5037 case X86::BI__builtin_ia32_permvarqi256:
5038 case X86::BI__builtin_ia32_permvarhi512:
5040 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5041 int Offset = ShuffleMask & 0x1F;
5042 return std::pair<unsigned, int>{0, Offset};
5044 case X86::BI__builtin_ia32_permvarqi512:
5046 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5047 int Offset = ShuffleMask & 0x3F;
5048 return std::pair<unsigned, int>{0, Offset};
5050 case X86::BI__builtin_ia32_vpermi2varq128:
5051 case X86::BI__builtin_ia32_vpermi2varpd128:
5053 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5054 int Offset = ShuffleMask & 0x1;
5055 unsigned SrcIdx = (ShuffleMask >> 1) & 0x1;
5056 return std::pair<unsigned, int>{SrcIdx, Offset};
5058 case X86::BI__builtin_ia32_vpermi2vard128:
5059 case X86::BI__builtin_ia32_vpermi2varps128:
5060 case X86::BI__builtin_ia32_vpermi2varq256:
5061 case X86::BI__builtin_ia32_vpermi2varpd256:
5063 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5064 int Offset = ShuffleMask & 0x3;
5065 unsigned SrcIdx = (ShuffleMask >> 2) & 0x1;
5066 return std::pair<unsigned, int>{SrcIdx, Offset};
5068 case X86::BI__builtin_ia32_vpermi2varhi128:
5069 case X86::BI__builtin_ia32_vpermi2vard256:
5070 case X86::BI__builtin_ia32_vpermi2varps256:
5071 case X86::BI__builtin_ia32_vpermi2varq512:
5072 case X86::BI__builtin_ia32_vpermi2varpd512:
5074 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5075 int Offset = ShuffleMask & 0x7;
5076 unsigned SrcIdx = (ShuffleMask >> 3) & 0x1;
5077 return std::pair<unsigned, int>{SrcIdx, Offset};
5079 case X86::BI__builtin_ia32_vpermi2varqi128:
5080 case X86::BI__builtin_ia32_vpermi2varhi256:
5081 case X86::BI__builtin_ia32_vpermi2vard512:
5082 case X86::BI__builtin_ia32_vpermi2varps512:
5084 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5085 int Offset = ShuffleMask & 0xF;
5086 unsigned SrcIdx = (ShuffleMask >> 4) & 0x1;
5087 return std::pair<unsigned, int>{SrcIdx, Offset};
5089 case X86::BI__builtin_ia32_vpermi2varqi256:
5090 case X86::BI__builtin_ia32_vpermi2varhi512:
5092 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5093 int Offset = ShuffleMask & 0x1F;
5094 unsigned SrcIdx = (ShuffleMask >> 5) & 0x1;
5095 return std::pair<unsigned, int>{SrcIdx, Offset};
5097 case X86::BI__builtin_ia32_vpermi2varqi512:
5099 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5100 int Offset = ShuffleMask & 0x3F;
5101 unsigned SrcIdx = (ShuffleMask >> 6) & 0x1;
5102 return std::pair<unsigned, int>{SrcIdx, Offset};
5104 case X86::BI__builtin_ia32_pshufb128:
5105 case X86::BI__builtin_ia32_pshufb256:
5106 case X86::BI__builtin_ia32_pshufb512:
5108 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5109 uint8_t Ctlb =
static_cast<uint8_t
>(ShuffleMask);
5111 return std::make_pair(0, -1);
5113 unsigned LaneBase = (DstIdx / 16) * 16;
5114 unsigned SrcOffset = Ctlb & 0x0F;
5115 unsigned SrcIdx = LaneBase + SrcOffset;
5116 return std::make_pair(0,
static_cast<int>(SrcIdx));
5119 case X86::BI__builtin_ia32_pshuflw:
5120 case X86::BI__builtin_ia32_pshuflw256:
5121 case X86::BI__builtin_ia32_pshuflw512:
5123 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5124 unsigned LaneBase = (DstIdx / 8) * 8;
5125 unsigned LaneIdx = DstIdx % 8;
5127 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5128 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5131 return std::make_pair(0,
static_cast<int>(DstIdx));
5134 case X86::BI__builtin_ia32_pshufhw:
5135 case X86::BI__builtin_ia32_pshufhw256:
5136 case X86::BI__builtin_ia32_pshufhw512:
5138 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5139 unsigned LaneBase = (DstIdx / 8) * 8;
5140 unsigned LaneIdx = DstIdx % 8;
5142 unsigned Sel = (ShuffleMask >> (2 * (LaneIdx - 4))) & 0x3;
5143 return std::make_pair(0,
static_cast<int>(LaneBase + 4 + Sel));
5146 return std::make_pair(0,
static_cast<int>(DstIdx));
5149 case X86::BI__builtin_ia32_pshufd:
5150 case X86::BI__builtin_ia32_pshufd256:
5151 case X86::BI__builtin_ia32_pshufd512:
5152 case X86::BI__builtin_ia32_vpermilps:
5153 case X86::BI__builtin_ia32_vpermilps256:
5154 case X86::BI__builtin_ia32_vpermilps512:
5156 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5157 unsigned LaneBase = (DstIdx / 4) * 4;
5158 unsigned LaneIdx = DstIdx % 4;
5159 unsigned Sel = (ShuffleMask >> (2 * LaneIdx)) & 0x3;
5160 return std::make_pair(0,
static_cast<int>(LaneBase + Sel));
5163 case X86::BI__builtin_ia32_vpermilvarpd:
5164 case X86::BI__builtin_ia32_vpermilvarpd256:
5165 case X86::BI__builtin_ia32_vpermilvarpd512:
5167 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5168 unsigned NumElemPerLane = 2;
5169 unsigned Lane = DstIdx / NumElemPerLane;
5170 unsigned Offset = ShuffleMask & 0b10 ? 1 : 0;
5171 return std::make_pair(
5172 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5175 case X86::BI__builtin_ia32_vpermilvarps:
5176 case X86::BI__builtin_ia32_vpermilvarps256:
5177 case X86::BI__builtin_ia32_vpermilvarps512:
5179 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned ShuffleMask) {
5180 unsigned NumElemPerLane = 4;
5181 unsigned Lane = DstIdx / NumElemPerLane;
5182 unsigned Offset = ShuffleMask & 0b11;
5183 return std::make_pair(
5184 0,
static_cast<int>(Lane * NumElemPerLane + Offset));
5187 case X86::BI__builtin_ia32_vpermilpd:
5188 case X86::BI__builtin_ia32_vpermilpd256:
5189 case X86::BI__builtin_ia32_vpermilpd512:
5191 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5192 unsigned NumElemPerLane = 2;
5193 unsigned BitsPerElem = 1;
5194 unsigned MaskBits = 8;
5195 unsigned IndexMask = 0x1;
5196 unsigned Lane = DstIdx / NumElemPerLane;
5197 unsigned LaneOffset = Lane * NumElemPerLane;
5198 unsigned BitIndex = (DstIdx * BitsPerElem) % MaskBits;
5199 unsigned Index = (Control >> BitIndex) & IndexMask;
5200 return std::make_pair(0,
static_cast<int>(LaneOffset + Index));
5203 case X86::BI__builtin_ia32_permdf256:
5204 case X86::BI__builtin_ia32_permdi256:
5206 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Control) {
5209 unsigned Index = (Control >> (2 * DstIdx)) & 0x3;
5210 return std::make_pair(0,
static_cast<int>(Index));
5213 case X86::BI__builtin_ia32_vpmultishiftqb128:
5214 case X86::BI__builtin_ia32_vpmultishiftqb256:
5215 case X86::BI__builtin_ia32_vpmultishiftqb512:
5217 case X86::BI__builtin_ia32_kandqi:
5218 case X86::BI__builtin_ia32_kandhi:
5219 case X86::BI__builtin_ia32_kandsi:
5220 case X86::BI__builtin_ia32_kanddi:
5223 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS & RHS; });
5225 case X86::BI__builtin_ia32_kandnqi:
5226 case X86::BI__builtin_ia32_kandnhi:
5227 case X86::BI__builtin_ia32_kandnsi:
5228 case X86::BI__builtin_ia32_kandndi:
5231 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~LHS & RHS; });
5233 case X86::BI__builtin_ia32_korqi:
5234 case X86::BI__builtin_ia32_korhi:
5235 case X86::BI__builtin_ia32_korsi:
5236 case X86::BI__builtin_ia32_kordi:
5239 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS | RHS; });
5241 case X86::BI__builtin_ia32_kxnorqi:
5242 case X86::BI__builtin_ia32_kxnorhi:
5243 case X86::BI__builtin_ia32_kxnorsi:
5244 case X86::BI__builtin_ia32_kxnordi:
5247 [](
const APSInt &LHS,
const APSInt &RHS) {
return ~(LHS ^ RHS); });
5249 case X86::BI__builtin_ia32_kxorqi:
5250 case X86::BI__builtin_ia32_kxorhi:
5251 case X86::BI__builtin_ia32_kxorsi:
5252 case X86::BI__builtin_ia32_kxordi:
5255 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS ^ RHS; });
5257 case X86::BI__builtin_ia32_knotqi:
5258 case X86::BI__builtin_ia32_knothi:
5259 case X86::BI__builtin_ia32_knotsi:
5260 case X86::BI__builtin_ia32_knotdi:
5262 S, OpPC,
Call, [](
const APSInt &Src) {
return ~Src; });
5264 case X86::BI__builtin_ia32_kaddqi:
5265 case X86::BI__builtin_ia32_kaddhi:
5266 case X86::BI__builtin_ia32_kaddsi:
5267 case X86::BI__builtin_ia32_kadddi:
5270 [](
const APSInt &LHS,
const APSInt &RHS) {
return LHS + RHS; });
5272 case X86::BI__builtin_ia32_kmovb:
5273 case X86::BI__builtin_ia32_kmovw:
5274 case X86::BI__builtin_ia32_kmovd:
5275 case X86::BI__builtin_ia32_kmovq:
5277 S, OpPC,
Call, [](
const APSInt &Src) {
return Src; });
5279 case X86::BI__builtin_ia32_kunpckhi:
5280 case X86::BI__builtin_ia32_kunpckdi:
5281 case X86::BI__builtin_ia32_kunpcksi:
5286 unsigned BW = A.getBitWidth();
5287 return APSInt(A.trunc(BW / 2).concat(B.trunc(BW / 2)),
5291 case X86::BI__builtin_ia32_phminposuw128:
5294 case X86::BI__builtin_ia32_psraq128:
5295 case X86::BI__builtin_ia32_psraq256:
5296 case X86::BI__builtin_ia32_psraq512:
5297 case X86::BI__builtin_ia32_psrad128:
5298 case X86::BI__builtin_ia32_psrad256:
5299 case X86::BI__builtin_ia32_psrad512:
5300 case X86::BI__builtin_ia32_psraw128:
5301 case X86::BI__builtin_ia32_psraw256:
5302 case X86::BI__builtin_ia32_psraw512:
5305 [](
const APInt &Elt, uint64_t Count) {
return Elt.ashr(Count); },
5306 [](
const APInt &Elt,
unsigned Width) {
return Elt.ashr(Width - 1); });
5308 case X86::BI__builtin_ia32_psllq128:
5309 case X86::BI__builtin_ia32_psllq256:
5310 case X86::BI__builtin_ia32_psllq512:
5311 case X86::BI__builtin_ia32_pslld128:
5312 case X86::BI__builtin_ia32_pslld256:
5313 case X86::BI__builtin_ia32_pslld512:
5314 case X86::BI__builtin_ia32_psllw128:
5315 case X86::BI__builtin_ia32_psllw256:
5316 case X86::BI__builtin_ia32_psllw512:
5319 [](
const APInt &Elt, uint64_t Count) {
return Elt.shl(Count); },
5320 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5322 case X86::BI__builtin_ia32_psrlq128:
5323 case X86::BI__builtin_ia32_psrlq256:
5324 case X86::BI__builtin_ia32_psrlq512:
5325 case X86::BI__builtin_ia32_psrld128:
5326 case X86::BI__builtin_ia32_psrld256:
5327 case X86::BI__builtin_ia32_psrld512:
5328 case X86::BI__builtin_ia32_psrlw128:
5329 case X86::BI__builtin_ia32_psrlw256:
5330 case X86::BI__builtin_ia32_psrlw512:
5333 [](
const APInt &Elt, uint64_t Count) {
return Elt.lshr(Count); },
5334 [](
const APInt &Elt,
unsigned Width) {
return APInt::getZero(Width); });
5336 case X86::BI__builtin_ia32_pternlogd128_mask:
5337 case X86::BI__builtin_ia32_pternlogd256_mask:
5338 case X86::BI__builtin_ia32_pternlogd512_mask:
5339 case X86::BI__builtin_ia32_pternlogq128_mask:
5340 case X86::BI__builtin_ia32_pternlogq256_mask:
5341 case X86::BI__builtin_ia32_pternlogq512_mask:
5343 case X86::BI__builtin_ia32_pternlogd128_maskz:
5344 case X86::BI__builtin_ia32_pternlogd256_maskz:
5345 case X86::BI__builtin_ia32_pternlogd512_maskz:
5346 case X86::BI__builtin_ia32_pternlogq128_maskz:
5347 case X86::BI__builtin_ia32_pternlogq256_maskz:
5348 case X86::BI__builtin_ia32_pternlogq512_maskz:
5350 case Builtin::BI__builtin_elementwise_fshl:
5352 llvm::APIntOps::fshl);
5353 case Builtin::BI__builtin_elementwise_fshr:
5355 llvm::APIntOps::fshr);
5357 case X86::BI__builtin_ia32_shuf_f32x4_256:
5358 case X86::BI__builtin_ia32_shuf_i32x4_256:
5359 case X86::BI__builtin_ia32_shuf_f64x2_256:
5360 case X86::BI__builtin_ia32_shuf_i64x2_256:
5361 case X86::BI__builtin_ia32_shuf_f32x4:
5362 case X86::BI__builtin_ia32_shuf_i32x4:
5363 case X86::BI__builtin_ia32_shuf_f64x2:
5364 case X86::BI__builtin_ia32_shuf_i64x2: {
5370 unsigned LaneBits = 128u;
5371 unsigned NumLanes = (NumElems * ElemBits) / LaneBits;
5372 unsigned NumElemsPerLane = LaneBits / ElemBits;
5376 [NumLanes, NumElemsPerLane](
unsigned DstIdx,
unsigned ShuffleMask) {
5378 unsigned BitsPerElem = NumLanes / 2;
5379 unsigned IndexMask = (1u << BitsPerElem) - 1;
5380 unsigned Lane = DstIdx / NumElemsPerLane;
5381 unsigned SrcIdx = (Lane < NumLanes / 2) ? 0 : 1;
5382 unsigned BitIdx = BitsPerElem * Lane;
5383 unsigned SrcLaneIdx = (ShuffleMask >> BitIdx) & IndexMask;
5384 unsigned ElemInLane = DstIdx % NumElemsPerLane;
5385 unsigned IdxToPick = SrcLaneIdx * NumElemsPerLane + ElemInLane;
5386 return std::pair<unsigned, int>{SrcIdx, IdxToPick};
5390 case X86::BI__builtin_ia32_insertf32x4_256:
5391 case X86::BI__builtin_ia32_inserti32x4_256:
5392 case X86::BI__builtin_ia32_insertf64x2_256:
5393 case X86::BI__builtin_ia32_inserti64x2_256:
5394 case X86::BI__builtin_ia32_insertf32x4:
5395 case X86::BI__builtin_ia32_inserti32x4:
5396 case X86::BI__builtin_ia32_insertf64x2_512:
5397 case X86::BI__builtin_ia32_inserti64x2_512:
5398 case X86::BI__builtin_ia32_insertf32x8:
5399 case X86::BI__builtin_ia32_inserti32x8:
5400 case X86::BI__builtin_ia32_insertf64x4:
5401 case X86::BI__builtin_ia32_inserti64x4:
5402 case X86::BI__builtin_ia32_vinsertf128_ps256:
5403 case X86::BI__builtin_ia32_vinsertf128_pd256:
5404 case X86::BI__builtin_ia32_vinsertf128_si256:
5405 case X86::BI__builtin_ia32_insert128i256:
5408 case clang::X86::BI__builtin_ia32_vcvtps2ph:
5409 case clang::X86::BI__builtin_ia32_vcvtps2ph256:
5412 case X86::BI__builtin_ia32_vec_ext_v4hi:
5413 case X86::BI__builtin_ia32_vec_ext_v16qi:
5414 case X86::BI__builtin_ia32_vec_ext_v8hi:
5415 case X86::BI__builtin_ia32_vec_ext_v4si:
5416 case X86::BI__builtin_ia32_vec_ext_v2di:
5417 case X86::BI__builtin_ia32_vec_ext_v32qi:
5418 case X86::BI__builtin_ia32_vec_ext_v16hi:
5419 case X86::BI__builtin_ia32_vec_ext_v8si:
5420 case X86::BI__builtin_ia32_vec_ext_v4di:
5421 case X86::BI__builtin_ia32_vec_ext_v4sf:
5424 case X86::BI__builtin_ia32_vec_set_v4hi:
5425 case X86::BI__builtin_ia32_vec_set_v16qi:
5426 case X86::BI__builtin_ia32_vec_set_v8hi:
5427 case X86::BI__builtin_ia32_vec_set_v4si:
5428 case X86::BI__builtin_ia32_vec_set_v2di:
5429 case X86::BI__builtin_ia32_vec_set_v32qi:
5430 case X86::BI__builtin_ia32_vec_set_v16hi:
5431 case X86::BI__builtin_ia32_vec_set_v8si:
5432 case X86::BI__builtin_ia32_vec_set_v4di:
5435 case X86::BI__builtin_ia32_cvtb2mask128:
5436 case X86::BI__builtin_ia32_cvtb2mask256:
5437 case X86::BI__builtin_ia32_cvtb2mask512:
5438 case X86::BI__builtin_ia32_cvtw2mask128:
5439 case X86::BI__builtin_ia32_cvtw2mask256:
5440 case X86::BI__builtin_ia32_cvtw2mask512:
5441 case X86::BI__builtin_ia32_cvtd2mask128:
5442 case X86::BI__builtin_ia32_cvtd2mask256:
5443 case X86::BI__builtin_ia32_cvtd2mask512:
5444 case X86::BI__builtin_ia32_cvtq2mask128:
5445 case X86::BI__builtin_ia32_cvtq2mask256:
5446 case X86::BI__builtin_ia32_cvtq2mask512:
5449 case X86::BI__builtin_ia32_cvtsd2ss:
5452 case X86::BI__builtin_ia32_cvtsd2ss_round_mask:
5455 case X86::BI__builtin_ia32_cvtpd2ps:
5456 case X86::BI__builtin_ia32_cvtpd2ps256:
5458 case X86::BI__builtin_ia32_cvtpd2ps_mask:
5460 case X86::BI__builtin_ia32_cvtpd2ps512_mask:
5463 case X86::BI__builtin_ia32_cmpb128_mask:
5464 case X86::BI__builtin_ia32_cmpw128_mask:
5465 case X86::BI__builtin_ia32_cmpd128_mask:
5466 case X86::BI__builtin_ia32_cmpq128_mask:
5467 case X86::BI__builtin_ia32_cmpb256_mask:
5468 case X86::BI__builtin_ia32_cmpw256_mask:
5469 case X86::BI__builtin_ia32_cmpd256_mask:
5470 case X86::BI__builtin_ia32_cmpq256_mask:
5471 case X86::BI__builtin_ia32_cmpb512_mask:
5472 case X86::BI__builtin_ia32_cmpw512_mask:
5473 case X86::BI__builtin_ia32_cmpd512_mask:
5474 case X86::BI__builtin_ia32_cmpq512_mask:
5478 case X86::BI__builtin_ia32_ucmpb128_mask:
5479 case X86::BI__builtin_ia32_ucmpw128_mask:
5480 case X86::BI__builtin_ia32_ucmpd128_mask:
5481 case X86::BI__builtin_ia32_ucmpq128_mask:
5482 case X86::BI__builtin_ia32_ucmpb256_mask:
5483 case X86::BI__builtin_ia32_ucmpw256_mask:
5484 case X86::BI__builtin_ia32_ucmpd256_mask:
5485 case X86::BI__builtin_ia32_ucmpq256_mask:
5486 case X86::BI__builtin_ia32_ucmpb512_mask:
5487 case X86::BI__builtin_ia32_ucmpw512_mask:
5488 case X86::BI__builtin_ia32_ucmpd512_mask:
5489 case X86::BI__builtin_ia32_ucmpq512_mask:
5493 case X86::BI__builtin_ia32_vpshufbitqmb128_mask:
5494 case X86::BI__builtin_ia32_vpshufbitqmb256_mask:
5495 case X86::BI__builtin_ia32_vpshufbitqmb512_mask:
5498 case X86::BI__builtin_ia32_pslldqi128_byteshift:
5499 case X86::BI__builtin_ia32_pslldqi256_byteshift:
5500 case X86::BI__builtin_ia32_pslldqi512_byteshift:
5507 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5508 unsigned LaneBase = (DstIdx / 16) * 16;
5509 unsigned LaneIdx = DstIdx % 16;
5510 if (LaneIdx < Shift)
5511 return std::make_pair(0, -1);
5513 return std::make_pair(0,
5514 static_cast<int>(LaneBase + LaneIdx - Shift));
5517 case X86::BI__builtin_ia32_psrldqi128_byteshift:
5518 case X86::BI__builtin_ia32_psrldqi256_byteshift:
5519 case X86::BI__builtin_ia32_psrldqi512_byteshift:
5526 [](
unsigned DstIdx,
unsigned Shift) -> std::pair<unsigned, int> {
5527 unsigned LaneBase = (DstIdx / 16) * 16;
5528 unsigned LaneIdx = DstIdx % 16;
5529 if (LaneIdx + Shift < 16)
5530 return std::make_pair(0,
5531 static_cast<int>(LaneBase + LaneIdx + Shift));
5533 return std::make_pair(0, -1);
5536 case X86::BI__builtin_ia32_palignr128:
5537 case X86::BI__builtin_ia32_palignr256:
5538 case X86::BI__builtin_ia32_palignr512:
5540 S, OpPC,
Call, [](
unsigned DstIdx,
unsigned Shift) {
5542 unsigned VecIdx = 1;
5545 int Lane = DstIdx / 16;
5546 int Offset = DstIdx % 16;
5549 unsigned ShiftedIdx = Offset + (Shift & 0xFF);
5550 if (ShiftedIdx < 16) {
5551 ElemIdx = ShiftedIdx + (Lane * 16);
5552 }
else if (ShiftedIdx < 32) {
5554 ElemIdx = (ShiftedIdx - 16) + (Lane * 16);
5557 return std::pair<unsigned, int>{VecIdx, ElemIdx};
5560 case X86::BI__builtin_ia32_alignd128:
5561 case X86::BI__builtin_ia32_alignd256:
5562 case X86::BI__builtin_ia32_alignd512:
5563 case X86::BI__builtin_ia32_alignq128:
5564 case X86::BI__builtin_ia32_alignq256:
5565 case X86::BI__builtin_ia32_alignq512: {
5566 unsigned NumElems =
Call->getType()->castAs<
VectorType>()->getNumElements();
5568 S, OpPC,
Call, [NumElems](
unsigned DstIdx,
unsigned Shift) {
5569 unsigned Imm = Shift & 0xFF;
5570 unsigned EffectiveShift = Imm & (NumElems - 1);
5571 unsigned SourcePos = DstIdx + EffectiveShift;
5572 unsigned VecIdx = SourcePos < NumElems ? 1u : 0u;
5573 unsigned ElemIdx = SourcePos & (NumElems - 1);
5574 return std::pair<unsigned, int>{VecIdx,
static_cast<int>(ElemIdx)};
5580 diag::note_invalid_subexpr_in_const_expr)
5586 llvm_unreachable(
"Unhandled builtin ID");